TDA9965A - NXP

TDA9965A 40 Msps analog-to-digital interface for CCD cameras

PARAMETER analog supply voltage digital supply voltage digital output supply voltage analog supply current digital supply current digital output supply current ADC resolution CTH input voltage (peak-to-peak value) CTH output amplifier gain PGA dynamic range maximum pixel frequency total noise from CTH input to ADC output (RMS value) equivalent input noise (RM.

Features

• Clamp and Track/Hold (CTH) circuit with adjustable bandwidth, Programmable Gain Amplifier (PGA), 12-bit Analog-to-Digital Converter (ADC) and reference regulator
• Fully programmable via a 3-wire serial interface
• Sampling frequency up to 40 MHz
• PGA gain from 0 to 36 dB (in 0.05 dB steps)
• CTH programmable bandwidth from 35 to 284 MHz typical
• Standby mode (20 mW typical)
• Low power consumption of only 425 mW typical
• 5 V operation and 3 to 5.25 V operation for the digital outputs QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO ADCres Vi(IN)(p-p) GCTH PGAdyn fpix(max) Ntot(r.