TC74HC4028AF - Toshiba

TC74HC4028AF BCD-to-Decimal Decoder

TC74HC4028AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4028AP, TC74HC4028AF BCD-to-Decimal Decoder The TC74HC4028A is a high speed CMOS BCD-to-DECIMAL DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. A BCD code a.

Features

• High speed: tpd = 18 ns (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced propagation delays: tpLH ∼− tpHL
• Wide operating voltage range: VCC (opr) = 2 to 6 V
• Pin and function compatible with 4028B. Pin Assignment TC74HC4028AP TC74HC4028AF Weight DIP16-P-300-2.54A SOP16-P-300-1.27A : 1.00 g (typ.) : 0.18 g (typ.) Start of commercial production 1988-11 1 2014-03-01 IEC Logic Symbol TC74HC4028AP/AF T.