TC74HC4024AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4024AP, TC74HC4024AF 7-Stage Binary Counter The TC74HC4024A is a high speed CMOS 7-STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. A negative t.
• High speed: fmax = 70 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced propagation delays: tpLH ∼− tpHL
• Wide operating voltage range: VCC (opr) = 2 to 6 V
• Pin and function compatible with 4024B
Pin Assignment
TC74HC4024AP
TC74HC4024AF
Weight DIP14-P-300-2.54 SOP14-P-300-1.27A
: 0.96 g (typ.) : 0.18 g (typ.)
Start of commercial production
1988-11
1
2014-03-01
IEC Logic Symbol
Truth Table
Inp.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | TC74HC4024AF |
Toshiba |
7-Stage Binary Counter | |
2 | TC74HC4020AF |
Toshiba Semiconductor |
14-Stage Binary Counter | |
3 | TC74HC4020AP |
Toshiba Semiconductor |
14-Stage Binary Counter | |
4 | TC74HC4028AF |
Toshiba |
BCD-to-Decimal Decoder | |
5 | TC74HC4028AP |
Toshiba |
BCD-to-Decimal Decoder | |
6 | TC74HC4002AF |
Toshiba |
Dual 4-Input NOR Gate | |
7 | TC74HC4002AP |
Toshiba |
Dual 4-Input NOR Gate | |
8 | TC74HC40102AF |
Toshiba |
Dual BCD Programmable Down Counter | |
9 | TC74HC40102AP |
Toshiba |
Dual BCD Programmable Down Counter | |
10 | TC74HC40103AF |
Toshiba |
8-Bit Binary Programmable Down Counter | |
11 | TC74HC40103AP |
Toshiba |
8-Bit Binary Programmable Down Counter | |
12 | TC74HC40105AF |
Toshiba |
4-Bit x 16 Word FIFO Register |