Recherchez avec le numéro de pièce ainsi que le fabricant ou la description
Count Inhibit Count is inhibited regardless of other inputs. Regular Count Down count on the rising edge of CK Synchronous Preset Input data is preset on the rising edge of CK Asynchronous Preset Input data is asynchronously preset to CK Clear Counter is set to maximum count. X: Don’t care Maximum count: TC74HC40102A “99”, TC74HC40103A “255” 2 2014.
• High speed: fmax 40 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced propagation delays: tpLH ∼− tpHL
• Wide operating voltage range: VCC (opr) = 2 to 6 V
• Pin and function compatible with 40102B, 40103B
Weight DIP16-P-300-2.54A SOP16-P-300-1.27A
: 1.00 g (typ.) : 0.18 g (typ.)
Pin Assignment
Start of commercial production
1988-11
1
2014-03-01
IEC Logic Symbol
TC74HC40102A
TC74HC40102,40103AP/AF.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | TC74HC40103AP |
Toshiba |
8-Bit Binary Programmable Down Counter |
|
| 2 | TC74HC40102AF |
Toshiba |
Dual BCD Programmable Down Counter |
|
| 3 | TC74HC40102AP |
Toshiba |
Dual BCD Programmable Down Counter |
|
| 4 | TC74HC40105AF |
Toshiba |
4-Bit x 16 Word FIFO Register |
|
| 5 | TC74HC40105AP |
Toshiba |
4-Bit x 16 Word FIFO Register |
|
| 6 | TC74HC4017AF |
Toshiba |
Decade Counter/Divider |
|
| 7 | TC74HC4017AP |
Toshiba |
Decade Counter/Divider |
|
| 8 | TC74HC4002AF |
Toshiba |
Dual 4-Input NOR Gate |
|
| 9 | TC74HC4002AP |
Toshiba |
Dual 4-Input NOR Gate |
|
| 10 | TC74HC4020AF |
Toshiba Semiconductor |
14-Stage Binary Counter |
|
| 11 | TC74HC4020AP |
Toshiba Semiconductor |
14-Stage Binary Counter |
|
| 12 | TC74HC4024AF |
Toshiba |
7-Stage Binary Counter |
|