STP3NA60 - ST Microelectronics

STP3NA60 N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR

This series of POWER MOSFETS represents the most advanced high voltage technology. The optimized cell layout coupled with a new proprietary edge termination concur to give the device low RDS(on) and gate charge, unequalled ruggedness and superior switching performance. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC.

Features

I DM (
•) P tot V ISO T stg Tj Drain-source Voltage (V GS = 0) Drain-gate Voltage (R GS = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 25 C Drain Current (continuous) at T c = 100 o C Drain Current (pulsed) Total Dissipation at T c = 25 C Derating Factor Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature o V V V 2.1 1.3 11.6 40 0.32 2000 A A A W W/o C V o o 2.9 1.8 11.6 80 0.64  -65 to 150 150 C C (
•) Pulse width limited by safe operating area November 1996 1/10 STP3NA60/FI THERMAL DATA TO-220 R thj-case R thj-amb R t hc-sink.