STD413S - SamHop Microelectronics

STD413S P-Channel Logic Level Enhancement Mode Field Effect Transistor

STU/D413S S a mHop Microelectronics C orp. Ver 1.0 P-Channel Logic Level Enhancement Mode Field Effect Transistor PRODUCT SUMMARY V DSS -40V FEATURES Super high dense cell design for low R DS(ON). Rugged and reliable. Suface Mount Package. ESD Protected. ID -19A R DS(ON) (m Ω) Max 48 @ VGS=10V 78 @ VGS=4.5V G S G D S STU SERIES TO - 252AA( D - PAK ).

Features

Super high dense cell design for low R DS(ON). Rugged and reliable. Suface Mount Package. ESD Protected. ID -19A R DS(ON) (m Ω) Max 48 @ VGS=10V 78 @ VGS=4.5V G S G D S STU SERIES TO - 252AA( D - PAK ) STD SERIES TO - 251 ( I - PAK ) ABSOLUTE MAXIMUM RATINGS ( T A=25 °C unless otherwise noted ) Symbol Parameter VDS VGS ID IDM EAS PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous b a Limit -40 ±20 -19 -15 -58 16 Units V V A A A mJ W W °C TC=25°C T C=70°C d -Pulsed Sigle Pulse Avalanche Energy Maximum Power Dissipation a TC=25°C TC=70°C 32 20 -55 to 150 .