SN74AHC125Q - Texas Instruments

SN74AHC125Q QUADRUPLE BUS BUFFER GATE

The SN74AHC125Q is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE should be tied to VCC t.

Features

PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 125°C SOIC − D TSSOP − PW Tape and reel Tape and reel SN74AHC125QDR SN74AHC125QPWR AHC125Q HA125Q † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each buffer) INPUTS OE A OUTPUT Y LH H LL L HX Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this dat.