SN74AHC125-Q1 - Texas Instruments

SN74AHC125-Q1 QUADRUPLE BUS BUFFER GATE

ordering information The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE sho.

Features

ability of the driver. ORDERING INFORMATION{ TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 125°C SOIC − D TSSOP − PW Tape and reel Tape and reel SN74AHC125QDRQ1 SN74AHC125QPWRQ1 AHC125Q AHC125Q † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. FUNCTION TABLE (each buffer) INPUTS OE A OUTPUT Y LH H LL L HX Z Please be aware that an important notice conc.