SN74AHC125-EP - Texas Instruments

SN74AHC125-EP QUADRUPLE BUS BUFFER GATE

ordering information The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE sho.

Features

QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCLS485A
  – MAY 2003
  – REVISED JUNE 2003 D OR PW PACKAGE (TOP VIEW) 1OE 1A 1Y 2OE 2A 2Y GND 1 2 3 4 5 6 7 14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y description/ordering information The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a.