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SK100E151 - Semtech Corporation

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SK100E151 6-Bit D Register

The SK10/100E151 offers 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new high-performance ECL systems. This device is fully compatible with MC10E151 and MC100E151. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for the flip-flop.

Features

MC10E/100E151 Specified Over Industrial Temperature Range:
  –40oC to +85oC Available in 28-Pin PLCC Package PIN Description .unctional Block Diagram Pin D0–D5 CLK1, CLK2 D0 D R Q0 Q0
* .unction Data Inputs Clock Inputs Master Reset True Outputs Inver ting Outputs VCC to Output MR Q0–Q5 D1 D R Q1 Q1
* Q0
*–Q5
* VCC0 D2 D R Q2 Q2
* VCC0 CLK2 CLK1 D3 D R Q3 MR Q5
* 20 NC Q3
* 25 24 23 22 21 19 D4 D R Q4 Q4
* D5 D4 D3 26 27 28 1 2 3 4 10 11 5 6 7 8 9 Q5 18 17 16 Q4
* Q4 VCC Q3
* Q3 Q2
* Q2 D5 D R Q5 Q5
* VEE D2 D1 D0 PLCC TOP VIEW 15 14 13 12 CLK1 CLK2 MR Q0 NC Q0
* Q1 VC.

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