The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inputs ranging from 8 kHz to 644.53 MHz and generates two equal frequency-mult.
Provides jitter attenuation and frequency
Selectable loop bandwidth for jitter
translation between SONET/PDH and
attenuation: 60 to 8.4 kHz
Ethernet
Automatic/Manual hitless switching
Supports ITU-T G.8262 Synchronous
and holdover during loss of inputs
Ethernet equipment slave clock (EEC
clock
option 1 and 2) requirements with
Programmable output clock signal
optional Stratum 3 compliant timing card format: LVPECL, LVDS, CML or
clock source
CMOS
Two clock inputs/two clock outputs
40 MHz crystal or XO reference
Input frequency range: 8 kHz
–644 MHz
Single suppl.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SI531 |
Silicon Laboratories |
CRYSTAL OSCILLATOR | |
2 | Si531 |
Skyworks |
CRYSTAL OSCILLATOR | |
3 | Si53102-A1 |
Skyworks |
1:2 Fan-out Clock Buffer | |
4 | SI53102-A1 |
Silicon Laboratories |
FAN-OUT CLOCK BUFFER | |
5 | Si53102-A2 |
Skyworks |
1:2 Fan-out Clock Buffer | |
6 | SI53102-A2 |
Silicon Laboratories |
FAN-OUT CLOCK BUFFER | |
7 | Si53102-A3 |
Skyworks |
1:2 Fan-out Clock Buffer | |
8 | SI53102-A3 |
Silicon Laboratories |
FAN-OUT CLOCK BUFFER | |
9 | Si53106 |
Skyworks |
SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER | |
10 | SI53106 |
Silicon Laboratories |
SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER | |
11 | SI53108 |
Silicon Laboratories |
DB800ZL 8-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER | |
12 | SI53112 |
Silicon Laboratories |
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER |