SI53106 SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Datasheet

SI53106 SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER

The Si53106 is a low-power, 6-output, differential clock buffer that meets all of the performance requirements of the Intel DB1200ZL specification. The device is optimized for distributing reference clocks for Intel® QuickPath Interconnect (Intel QPI), PCIe Gen 1/Gen 2/Gen 3/Gen 4, SAS, SATA, and Intel Scalable Memory Interconnect (Intel SMI) applications. T.

Features

 Six 0.7 V low-power, push-pull,
 Low phase jitter (Intel QPI, PCIe HCSL-compatible PCIe Gen 3 Gen 1/2/3/4 common clock outputs compliant
 Individual OE HW pins for each
 Gen 3 SRNS Compliant output clock
 PLL or bypass mode
 100 MHz /133 MHz PLL
 Spread spectrum tolerable
 operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch
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 value from HW pin 1.05 to 3.3 V I/O supply voltage 50 ps output-to-output skew Industrial Temperature:
–40 to 85 °C
 SMBus address configurable to allow multiple buffers in a single
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 40-pin QFN For hig.

The same part from a different manufacturer

SI53106 - Skyworks

The Si53106 is a low-power, 6-output, differential clock buffer that meets all of the performance requirements of the I.

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SI53106 - Silicon Laboratories