SAA7111A - NXP

SAA7111A Enhanced Video Input Processor EVIP

QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Analog input processing Analog control circuits Clamping Gain control Chrominance processing Luminance processing RGB matrix VBI-data bypass VPO-bus (digital outputs) Reference signals HREF, VREF and CREF Synchronization Clock generation circuit Power-on reset and CE input.

Features

APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Analog input processing Analog control circuits Clamping Gain control Chrominance processing Luminance processing RGB matrix VBI-data bypass VPO-bus (digital outputs) Reference signals HREF, VREF and CREF Synchronization Clock generation circuit Power-on reset and CE input RTCO output The Line-21 text slicer Suggestions for I2C-bus interface of the display software reading line-21 data BOUNDARY-SCAN TEST Initialization of boundary-scan circuit Device identification codes GAIN.