SAA7103 - NXP

SAA7103 Digital video encoder

ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Reset conditions Input formatter RGB LUT Cursor insertion RGB Y-CB-CR matrix Horizontal scaler Vertical scaler and anti-flicker filter FIFO Border generator Oscillator and Discrete Time Oscillator (DTO) Low-pass Clock Generation Circuit (CGC) Encoder RGB processor Triple D.

Features

GENERAL DESCRIPTION ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Reset conditions Input formatter RGB LUT Cursor insertion RGB Y-CB-CR matrix Horizontal scaler Vertical scaler and anti-flicker filter FIFO Border generator Oscillator and Discrete Time Oscillator (DTO) Low-pass Clock Generation Circuit (CGC) Encoder RGB processor Triple DAC Timing generator I2C-bus interface Programming the SAA7102; SAA7103 Input levels and formats Bit allocation map I2C-bus format Slave receiver Slave transmitter BOUNDARY SCAN TEST Initialization of boundary scan circui.