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S3P72P9 - Samsung semiconductor

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S3P72P9 SINGLE-CHIP MICROCONTROLLER HAS BEEN DESIGNED FOR HIGH PERFORMANCE USING

Table 1-1. S3C72P9/P72P9 Pin Descriptions Pin Name P0.0 P0.1 P0.2 P0.3 Pin Type I/O Description 4-bit I/O port. 1-bit and 4-bit read/write and test are possible. Individual pins are software configurable as input or output. Individual pins are software configurable as opendrain or push-pull output. 4-bit pull-up resistors are software assignable; pull-up re.

Features

Memory

• 1,056 × 4-bit RAM (excluding LCD display RAM) 32,768 × 8-bit ROM
• 39 I/O Pins

• I/O: 35 pins Input only: 4 pins Interrupts
• LCD Controller/Driver




• 56 segments and 16 common terminals 8, 12 and 16 common selectable Internal resistor circuit for LCD bias All dot can be switched on/off LCD contrast control by software Power-Down Modes 8-bit Basic Timer

• 4 interval timer functions Watch-dog timer


• Idle mode (only CPU clock stops) Stop mode (main system oscillation stops) Subsystem clock stop mode Bit Sequential Carrier
• Supports 16-bit serial data transfer in arbit.

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