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S3P7295 - Samsung semiconductor

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S3P7295 The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M

Table 1-1. S3C7295 Pin Descriptions Pin Name P0.0 P0.1 P0.2 P0.3 Pin Type I/O Description 4-bit I/O port. 1-bit and 4-bit read/write and test are possible. Individual pins are software configurable as input or output. Individual pins are software configurable as opendrain or push-pull output. Individual pull-up resistors are software assignable; pull-up res.

Features

Memory

• 256 × 4-bit RAM (excluding LCD display RAM) 16,384 × 8-bit ROM Memory-Mapped I/O Structure
• Data memory bank 15 Power-Down Modes


• Idle mode (only CPU clock stops) Stop mode (main system oscillation stops) Sub system clock stop mode 8 I/O Pins
• I/O: 8 pins LCD Controller/Driver



• 44 segments and 16 common terminals (8, 12 and 16 common selectable) Internal resistor circuit for LCD bias Voltage doubler All dot can be switched on/off
• 8-bit Basic Timer

• 4 interval timer functions Watch-dog timer Instruction Execution Times
• 8-bit Timer/Counter


• Programmable 8-.

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