The NB3N551 is a low skew 1−to 4 clock fanout buffer, designed for clock distribution in mind. The NB3N551 specifically guarantees low output−to−output skew. Optimal design, layout and processing minimize skew within a device and from device to device. The output enable (OE) pin three−states the outputs when low. Features • Input/Output Clock Frequency up to.
• Input/Output Clock Frequency up to 180 MHz
• Low Skew Outputs (50 ps typical)
• RMS Phase Jitter (12 kHz
– 20 MHz): 43 fs (Typical)
• Output goes to Three−State Mode via OE
• Operating Range: VDD = 3.0 V to 5.5 V
• Ideal for Networking Clocks
• Packaged in 8−pin SOIC
• Industrial Temperature Range
• These are Pb−Free Devices
Q1
Q2 CLK
Q3
Q4
OE Figure 1. Block Diagram
http://onsemi.com
8 1
SOIC−8 D SUFFIX CASE 751
MARKING DIAGRAMS
* 8
3N551 ALYW
G
1
3N551 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week
G = Pb−Free Packa.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | NB3N5573 |
ON Semiconductor |
Dual HCSL Clock Generator | |
2 | NB3N501 |
ON Semiconductor |
3.3V / 5.0V 13 MHz to 160 MHz PLL Clock Multiplier | |
3 | NB3N502 |
ON Semiconductor |
14 MHz to 190 MHz PLL Clock Multiplier | |
4 | NB3N508S |
ON Semiconductor |
PureEdge VCXO Clock Generator | |
5 | NB3N51032 |
ON Semiconductor |
Dual HCSL/LVDS Clock Generator | |
6 | NB3N51034 |
ON Semiconductor |
Quad HCSL - LVDS Clock Generator | |
7 | NB3N51044 |
ON Semiconductor |
Quad HCSL / LVDS Clock Generator | |
8 | NB3N51054 |
ON Semiconductor |
Quad HCSL / LVDS Clock Generator | |
9 | NB3N511 |
ON Semiconductor |
3.3V / 5.0V 14MHz to 200MHz PLL Clock Multiplier | |
10 | NB3N106K |
ON Semiconductor |
3.3V Differential 1:6 Fanout Clock Driver | |
11 | NB3N108K |
ON Semiconductor |
3.3V Differential 1:8 Fanout Clock Data Driver | |
12 | NB3N111K |
ON Semiconductor |
3.3V Differential 1:10 Fanout Clock Driver |