The NB3N502 is a clock multiplier device that generates a low jitter, TTL/CMOS level output clock which is a precise multiple of the external input reference clock signal source. The device is a cost efficient replacement for the crystal oscillators commonly used in electronic systems. It accepts a standard fundamental mode crystal or an external reference c.
• Clock Output Frequency up to 190 MHz
• Operating Range: VDD = 3 V to 5.5 V
• Low Jitter Output of 15 ps One Sigma (rms)
• Zero ppm Clock Multiplication Error
• 45% − 55% Duty Cycle
• 25 mA TTL−level Drive Outputs
• Crystal Reference Input Range of 5 − 27 MHz
• Input Clock Frequency Range of 2 − 50 MHz
• Available in 8−pin SOIC Package or in Die Form
• Full Industrial Temperature Range −40°C to 85°C
• These are Pb−Free Devices
VDD
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8
1
SOIC−8 D SUFFIX CASE 751
MARKING DIAGRAM
8 3N502 ALYW G
1
3N502 = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | NB3N501 |
ON Semiconductor |
3.3V / 5.0V 13 MHz to 160 MHz PLL Clock Multiplier | |
2 | NB3N508S |
ON Semiconductor |
PureEdge VCXO Clock Generator | |
3 | NB3N51032 |
ON Semiconductor |
Dual HCSL/LVDS Clock Generator | |
4 | NB3N51034 |
ON Semiconductor |
Quad HCSL - LVDS Clock Generator | |
5 | NB3N51044 |
ON Semiconductor |
Quad HCSL / LVDS Clock Generator | |
6 | NB3N51054 |
ON Semiconductor |
Quad HCSL / LVDS Clock Generator | |
7 | NB3N511 |
ON Semiconductor |
3.3V / 5.0V 14MHz to 200MHz PLL Clock Multiplier | |
8 | NB3N551 |
ON Semiconductor |
Ultra-Low Skew 1:4 Clock Fanout Buffer | |
9 | NB3N5573 |
ON Semiconductor |
Dual HCSL Clock Generator | |
10 | NB3N106K |
ON Semiconductor |
3.3V Differential 1:6 Fanout Clock Driver | |
11 | NB3N108K |
ON Semiconductor |
3.3V Differential 1:8 Fanout Clock Data Driver | |
12 | NB3N111K |
ON Semiconductor |
3.3V Differential 1:10 Fanout Clock Driver |