MT48H16M16LFFG - Micron Technology

MT48H16M16LFFG 256M x 16 Mobile SDRAM

The 256Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quadbank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x16’s 67,108,864-bit banks is organized as 8,192 rows by 512 columns by 16 bits. Read and write acce.

Features

• Temperature Compensated Self Refresh (TCSR)
• Fully synchronous; all signals registered on positive edge of system clock
• Internal pipelined operation; column address can be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, includes CONCURRENT AUTO PRECHARGE and Auto Refresh Modes
• Self Refresh Mode
• 64ms, 8,192-cycle refresh
• LVTTL-compatible inputs and outputs
• Low voltage power supply
• Deep Power Down
• Partial Array Self Refresh power-saving mode MT48LC16LFFG, MT48LC16M16LFBG, MT48V16.