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www.DataSheet4U.com TECHNICAL DATA KK4021B 8-Bit Shift Register High-Voltage Silicon-Gate CMOS The KK4021B is an Edge-Triggered 8-Bit Shift Register (Parallel-toSerial Converter) with a synchronous Serial Data Input (DS), a Clock Input (CP), an asynchronous active HIGH Parallel Load Input (PL), eight asynchronous Parallel Data Inputs (P0-P7) and Buffered .
nput current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply
ORDERING INFORMATION KK4021BN Plastic KK4021BDW SOIC TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM FUNCTION TABLE
SERIAL OPERATION: t n n+1 n+2 n+3 CP DS 0 1 0 1 X PL 0 0 0 0 0 Q5 t=n+6 0 1 0 1 Q5 P7 D Q6 t=n+7 0 1 0 Q6 Q5 D Q6 D Q7 t=n+8
0 1 Q7 Q7 D
PARALLEL OPERATION: CP DS PL P5 P6 X PIN 16 =VCC PIN 8 = GND X 1 D D X = don’t care D = 1 or 0
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|---|---|---|---|---|
| 1 | KK4020B |
KODENSHI KOREA |
14 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS |
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| 2 | KK4023B |
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Triple 3-Input NAND Gate High-Voltage Silicon-Gate CMOS |
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| 3 | KK4024B |
KODENSHI KOREA |
7 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS |
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| 4 | KK4025B |
KODENSHI KOREA |
Triple 3-Input NOR Gate High-Voltage Silicon-Gate CMOS |
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| 5 | KK4027B |
KODENSHI KOREA |
Dual JK Flip-Flop |
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| 6 | KK4028B |
KODENSHI KOREA |
BCD-to-Decimal Decoder High-Voltage Silicon-Gate CMOS |
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| 7 | KK4029B |
KODENSHI KOREA |
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| 8 | KK4001B |
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| 9 | KK4002B |
KODENSHI KOREA |
Dual 4-Input NOR Gate High-Voltage Silicon-Gate CMOS |
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| 10 | KK4006B |
KODENSHI KOREA |
CMOS 18-Stage Static Shift Register |
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| 11 | KK4011B |
KODENSHI KOREA |
Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS |
|
| 12 | KK4012B |
KODENSHI KOREA |
Dual 4-Input NAND Gate High-Voltage Silicon-Gate CMOS |
|