The K7M323625M and K7M321825M are 37,748,736-bits Synchronous Static SRAMs. The N tRAMTM, or No Turnaround Random Access Memory utilizes all bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock. Burst order control must be tied "High or Low".
• 3.3V+0.165V/-0.165V Power Supply.
• I/O Supply Voltage 3.3V+0.165V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O
• Byte Writable Function.
• Enable clock and suspend operation.
• Single READ/WRITE control pin.
• Self-Timed Write Cycle.
• Three Chip Enable for simple depth expansion with no data contention .
• A interleaved burst or a linear burst mode.
• Asynchronous output enable control.
• Power Down mode.
• TTL-Level Three-State Outputs.
• 100-TQFP-1420A .
GENERAL DESCRIPTION
The K7M323625M and K7M321825M are 37,748,736-bits Synchronous Static SRAMs. The N tRAMTM, or No Turnarou.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | K7M321825M |
Samsung semiconductor |
1M x 36 & 2M x 18 Flow-Through NtRAM | |
2 | K7M161825A |
Samsung semiconductor |
512K x 36/32 & 1M x 18 Flow-Through NtRAM | |
3 | K7M161825M |
Samsung semiconductor |
(K7M161825M / K7M163625M) 512Kx36 & 1Mx18 Flow-Through NtRAM | |
4 | K7M161835B |
Samsung semiconductor |
512Kx36 & 1Mx18 Flow-Through NtRAM | |
5 | K7M163225A |
Samsung semiconductor |
512K x 36/32 & 1M x 18 Flow-Through NtRAM | |
6 | K7M163625A |
Samsung semiconductor |
512K x 36/32 & 1M x 18 Flow-Through NtRAM | |
7 | K7M163625M |
Samsung semiconductor |
(K7M161825M / K7M163625M) 512Kx36 & 1Mx18 Flow-Through NtRAM | |
8 | K7M163635B |
Samsung semiconductor |
512Kx36 & 1Mx18 Flow-Through NtRAM | |
9 | K7M801825B |
Samsung semiconductor |
256Kx36 & 512Kx18-Bit Flow Through NtRAM | |
10 | K7M803625B |
Samsung semiconductor |
256Kx36 & 512Kx18-Bit Flow Through NtRAM | |
11 | K701 |
ETC |
2SK701 | |
12 | K703 |
NEC |
2SK703 |