IW4019B - IK Semiconductor

IW4019B Quad AND-OR Gate

TECHNICAL DATA IW4019B Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS The IW4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits Sa and Sb .In addition to selection of either channel A or channel B information, the control bit.

Features

a t a ee . u t4 m o c 1 www.DataSheet4U.com IW4019B MAXIMUM RATINGS
* Symbol VCC VIN VOUT IIN PD PD Tstg TL
* Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 750 500 100 -65 to +150 260 Unit V V V mA mW mW °C °C Maximum Ratings are tho.