TECHNICAL DATA IW4011B Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS The IW4011B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package tempera.
ower Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 750 500 100 -65 to +150 260 Unit V V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Refe.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | IW4012B |
IK Semiconductor |
Dual 4-Input NAND Gate | |
2 | IW4013B |
ETC |
Dual D Flip-Flop High-Voltage Silicon-Gate CMOS | |
3 | IW4013B |
IK Semiconductor |
Dual D-Type Flip-Flop | |
4 | IW4015B |
IK Semiconductor |
Dual 4-Bit Static Shift Register | |
5 | IW4017B |
IK Semiconductor |
Decade Counter/Driver | |
6 | IW4019B |
IK Semiconductor |
Quad AND-OR Gate | |
7 | IW4001B |
IK Semiconductor |
Quad 2-Input NOR Gate | |
8 | IW4002B |
IK Semiconductor |
Dual 4-Input NOR Gate | |
9 | IW4006B |
IK Semiconductor |
18-Bit Static Shift Register | |
10 | IW4020B |
IK Semiconductor |
14-Bit Binary Divide Counter | |
11 | IW4021B |
IK Semiconductor |
8-Bit Shift Register | |
12 | IW4023B |
IK Semiconductor |
Triple 3-Input NAND GAte |