IS42VS16100D - Integrated Silicon Solution

IS42VS16100D 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

ISSI’s 16Mb Synchronous DRAM IS42VS16100D is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. ® www.DataSheet4U.c ADVANCED INFORMATION JULY 2005 FEATURES • Clock frequency: .

Features

• Clock frequency: 135, 100, 83 MHz
• Power Supply: 1.8V
• Fully synchronous; all signals referenced to a positive clock edge
• Two banks can be operated simultaneously and independently
• Dual internal bank controlled by A11 (bank select)
• Programmable burst length (1, 2, 4, 8, full page)
• Programmable burst sequence: Sequential/ Interleave
• Programmable full and half drive strength
• Programmable CAS latency (2, 3 clocks)
• 2048 refresh cycles every 32 ms
• Random column address every clock cycle
• Burst read/write and burst read/single write operations capability
• Byte controlled by LDQ.