HEF4086B - NXP

HEF4086B 4-wide 2-input AND-OR-invert gate

The HEF4086B is a 4-wide 2-input AND-OR-invert (AOI) gate with two additional inputs (I8 or I9) which can be used as either expander or inhibit inputs by connecting them to any standard LOCMOS output. A HIGH on I8 or a LOW on I9 forces the output (O) LOW independent of the other eight inputs (I0 to I7). The output (O) is fully buffered for highest noise immu.

Features

SO; plastic (SOT108-1) ( ): Package Designator North America Fig.1 Functional diagram. PINNING I0 to I8 I9 O gate inputs gate input (active LOW) output (active LOW) FAMILY DATA, IDD LIMITS category GATES See Family Specifications January 1995 2 Philips Semiconductors Product specification 4-wide 2-input AND-OR-invert gate HEF4086B gates Fig.3 Logic diagram. LOGIC EQUATION O = I0 ⋅ I1 + I2 ⋅ I3 + I4 ⋅ I5 + I6 ⋅ I7 + I8 + I9 January 1995 3 Philips Semiconductors Product specification 4-wide 2-input AND-OR-invert gate AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input tr.