HEF4085B - NXP

HEF4085B Dual 2-wide 2-input AND-OR-invert gate

The HEF4085B is a dual 2-wide 2-input AND-OR-invert gate, each with an additional input (A4 or B4) which can be used as either an expander input or an inhibit input. A HIGH on A4 or B4 forces the output (OA or OB) LOW independent of the other inputs (A0 to A3 or B0 to B3). The outputs OA and OB are fully buffered for highest noise immunity and pattern insens.

Features

SOT108-1) ( ): Package Designator North America Fig.1 Functional diagram. LOGIC FUNCTION OA = A0 ⋅ A1 + A2 ⋅ A3 + A4 OB = B0 ⋅ B1 + B2 ⋅ B3 + B4 FAMILY DATA, IDD LIMITS category GATES See Family Specifications Fig.3 Logic diagram (one gate). January 1995 2 Philips Semiconductors Product specification Dual 2-wide 2-input AND-OR-invert gate AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V Propagation delays An, Bn → On HIGH to LOW 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPLH tPHL 75 3.