The HD74HCT1G32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction with buffer provides wide noise margin and stable output. Features • The basic gate function is lined up as Renesas uni logic series. • Su.
• The basic gate function is lined up as Renesas uni logic series.
• Supplied on emboss taping for high-speed automatic mounting.
• TTL compatible input level. Supply voltage range : 4.5 to 5.5 V Operating temperature range :
–40 to +85°C
• |IOH| = IOL = 2 mA (min)
• Ordering Information
Part Name Package Type Package Code CMPAK-5V Package Abbreviation CM Taping Abbreviation (Quantity) E (3,000 pcs/reel)
HD74HCT1G32CME CMPAK-5 pin
Rev.5.00, Jan.29.2004, page 1 of 6
HD74HCT1G32
Outline and Article Indication
• HD74HCT1G32
Index band Marking
F
4
CMPAK
–5
= Control code
Function Table
Inp.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HD74HCT1G00 |
Renesas Technology |
2-input NAND Gate | |
2 | HD74HCT1G04 |
Hitachi Semiconductor |
High speed CMOS inverter using silicon gate CMOS process | |
3 | HD74HCT1G08 |
Renesas Technology |
2-input AND Gate | |
4 | HD74HCT1G66 |
Renesas Technology |
Analog Switch | |
5 | HD74HCT125 |
Hitachi Semiconductor |
Quad. Bus Buffer Gates (with 3-state outputs) | |
6 | HD74HCT126 |
Hitachi Semiconductor |
Quad. Bus Buffer Gates (with 3-state outputs) | |
7 | HD74HCT137 |
Hitachi Semiconductor |
3-to-8-line Decoder/Demultiplexer with Address Latch | |
8 | HD74HCT138 |
Hitachi Semiconductor |
3-to-8-line Decoder/Demultiplexer | |
9 | HD74HCT00A |
Hitachi Semiconductor |
Quad. 2-input Positive NAND Gates | |
10 | HD74HCT04A |
Hitachi Semiconductor |
Hex Inverters | |
11 | HD74HCT08A |
Hitachi Semiconductor |
Quad. 2-input Positive AND Gates | |
12 | HD74HCT237 |
Hitachi Semiconductor |
3-to-8-line Decoder/Demultiplexer with Address Latch |