FM28V102A - Cypress Semiconductor

FM28V102A 1-Mbit (64 K x 16) F-RAM Memory

Address inputs: The 16 address lines select one of 64K words in the F-RAM array. The lowest two address lines A1–A0 may be used for page mode read and write operations. Write Enable: A write cycle begins when WE is asserted. The rising edge causes the FM28V102A to write the data on the DQ bus to the F-RAM array. The falling edge of WE latches a new column ad.

Features

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■ Low-voltage operation: VDD = 2.0 V to 3.6 V Industrial temperature:
  –40 C to +85 C 44-pin thin small outline package (TSOP) Type II Restriction of hazardous substances (RoHS) compliant 1-Mbit ferroelectric random access memory (F-RAM) logically organized as 64 K × 16
❐ Configurable as 128 K × 8 using UB and LB 14
❐ High-endurance 100 trillion (10 ) read/writes
❐ 151-year data retention (see the Data Retention and Endurance table)
❐ NoDelay™ writes
❐ Page mode operation to 30-ns cycle time
❐ Advanced high-reliability ferroelectric process SRAM compatible
❐ Industry-standard 64 K .