EMF60P02JS - Excelliance MOS

EMF60P02JS P-Channel Logic Level Enhancement Mode Field Effect Transistor

P-Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: D BVDSS -20V RDSON (MAX.) 65mΩ ID -4A G S Pb-Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate-Source Voltage VGS Continuous Drain Current Pulsed Drain Current1 TA = 25 °C ID TA = 7.

Features

akdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current1 Drain-Source On-State Resistance1 Forward Transconductance1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) RDS(ON) gfs VGS = 0V, ID = -250µA VDS = VGS, ID = -250µA VDS = 0V, VGS = ±12V VDS = -16V, VGS = 0V VDS = -16V, VGS = 0V, TJ = 125 °C VDS = -5V, VGS = -4.5V VGS = -4.5V, ID = -3.5A VGS = -2.5V, ID = -2.5A VGS = -1.8V, ID = -1.0A VDS = -5V, ID = -3.5A DYNAMIC -20 V -0.3 -0.75 -1.2 ±100 nA -1 µA -10 -4 A 53 65 mΩ 75 96 150 250 10 S Input Capacitance Output Capacitance Reverse Tran.