EM68932DVKA - Etron Technology

EM68932DVKA 4M x 32 Mobile DDR Synchronous DRAM

Table 2. Pin Details of EM68932D Symbol CK, CK Type Input Description EM68932DVKA Differential Clock: CK, CK are driven by the system clock. All SDRAM input signals are sampled on the positive edge of CK. Both CK and CK increment the internal burst counter and controls the output registers. Clock Enable: CKE activates (HIGH) and deactivates (LOW) the CK s.

Features

Fast clock rate: 166/133 MHz Differential Clock CK & CK Bi-directional DQS Four internal banks, 1M x 32-bit for each bank Edge-aligned with read data, centered in write data Programmable Mode and Extended Mode Registers - CAS Latency: 2, or 3 - Burst length: 2, 4, or 8 - Burst Type: Sequential & Interleaved - PASR (Partial Array Self Refresh) - Auto TCSR (Temperature Compensated Self Refresh) - DS (Drive Strength)
• Individual byte writes mask control
• DM Write Latency = 0
• Precharge Standby Current = 100 µA
• Self Refresh Current = 200 µA
• Deep power-down Current = 10 µA max. at 85
• Auto .