32 PIN TOP VIEW 32 VCC 31 A15 30 A17 29 WE 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CS 21 I/O7 20 I/O6 19 I/O5 18 I/O4 17 I/O3 A -18 I/O 0-7 Data Inputs/Outputs A0-18 WE CS OE VCC V SS NC Address Inputs Write Enables Chip Selects Output Enable Power (+5V ±10%) Ground Not Connected BLOCK DIAGRAM Memory Array Address Buffer Address Decoder I/O Circuits .
■ Access Times of 15, 17, 20, 25, 35, 45, 55ns
■ Data Retention Function (LPA version)
■ TTL Compatible Inputs and Outputs
■ Fully Static, No Clocks
■ Organized as 512Kx8
■ Commercial, Industrial and Military Temperature Ranges
■ 32 lead JEDEC Approved Evolutionary Pinout
• Ceramic Sidebrazed 600 mil DIP (Package 9)
• Ceramic Sidebrazed 400 mil DIP (Package 326)
• Ceramic 32 pin Flatpack (Package 344)
• Ceramic Thin Flatpack (Package 321)
• Ceramic SOJ (Package 140)
■ 36 lead JEDEC Approved Revolutionary Pinout
• Ceramic Flatpack (Package 316)
• Ceramic SOJ (Package 327)
• Ceramic LCC (Package.
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power (+5V ±10%) Ground Not Connected BLOCK.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | EDI88512C |
Microsemi |
512Kx8 Monolithic SRAM | |
2 | EDI88512CA-XMXG |
Microsemi |
512Kx8 Plastic Monolithic SRAM CMOS | |
3 | EDI8808CA35 |
EDI |
High Speed 64K Monolithic SRAM | |
4 | EDI8808CA45 |
EDI |
High Speed 64K Monolithic SRAM | |
5 | EDI8808CA55 |
EDI |
High Speed 64K Monolithic SRAM | |
6 | EDI8808CA70 |
EDI |
High Speed 64K Monolithic SRAM | |
7 | EDI8810H |
EDI |
Low Power 6T CMOS Monolithic SRAM | |
8 | EDI8810L |
EDI |
Low Power 6T CMOS Monolithic SRAM | |
9 | EDI88128C |
ETC |
128K X 8 STATIC RAM CMOS MONOLITHIC | |
10 | EDI88128C |
White Electronic Designs |
128Kx8 MONOLITHIC SRAM | |
11 | EDI88128CS |
White Electronic Designs |
128Kx8 Monolithic SRAM | |
12 | EDI88128LP |
ETC |
128K X 8 STATIC RAM CMOS MONOLITHIC |