DS99R104 - Texas Instruments

DS99R104 3-40MHz DC-Balanced 24-Bit LVDS Serializer / Deserializer

The DS99R103/DS99R104 Chipset translates a 24bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths tha.

Features

1
•2 3 MHz
  –40 MHz Clock Embedded and DCBalancing 24:1 and 1:24 Data Transmissions
• Capable to Drive Shielded Twisted-Pair Cable
• User Selectable Clock Edge for Parallel Data on both Transmitter and Receiver
• Internal DC Balancing Encode/Decode
  – Supports AC-Coupling Interface with no External Coding Required
• Individual Power-Down Controls for both Transmitter and Receiver
• Embedded Clock CDR (Clock and Data Recovery) on Receiver and no External Source of Reference Clock Needed
• All Codes RDL (Random Data Lock) to Support Live-Pluggable Applications
• LOCK Output Flag to Ensure Data Inte.