DS90CR288 - National Semiconductor

DS90CR288 +3.3V Rising Edge Data Strobe LVDS

The DS90CR287 (see DS90CR287/288A datasheet) transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. The DS90CR288 re.

Features

n 20 to 75 MHz shift clock support n 50% duty cycle on receiver output clock n Best-in-Class Set & Hold Times on TxINPUTs and RxOUTPUTs n Low power consumption n Tx + Rx Powerdown mode < 400µW (max) n ± 1V common-mode range (around +1.2V) n Narrow bus reduces cable size and cost n Up to 2.10 Gbps throughput n Up to 262.5 Mbytes/sec bandwidth n 345 mV (typ) swing LVDS devices for low EMI n PLL requires no external components n Rising edge data strobe n Compatible with TIA/EIA-644 LVDS standard n Low profile 56-lead TSSOP package Block Diagrams DS90CR287 DS90CR288 DS100872-1 DS100872-27 Orde.