DS90CR283 - National Semiconductor

DS90CR283 28-Bit Channel Link

The DS90CR283 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. The DS90CR284 receiver converts the LVDS data .

Features

n n n n n n n n n n n 66 MHz clock support Up to 231 Mbytes/s bandwidth Low power CMOS design ( < 610 mW) Power Down mode ( < 0.5 mW total) Up to 1.848 Gbit/s data throughput Narrow bus reduces cable size and cost 290 mV swing LVDS devices for low EMI PLL requires no external components Low profile 56-lead TSSOP package Rising edge data strobe Compatible with TIA/EIA-644 LVDS Standard Block Diagrams DS90CR283 DS90CR284 DS012889-27 DS012889-1 Order Number DS90CR283MTD See NS Package Number MTD56 Order Number DS90CR284MTD See NS Package Number MTD56 TRI-STATE ® is a registered trademark of.