DL011 is a transparent, unbuffered D latch with active low gate transparency. RESET is active low. Logic Symbol Truth Table Pin Loading DL011 DQ G R RN D GN Q HLLL HH L H H X H NC LXXL NC = No Change Equivalent Load D 1.0 GN 1.0 RN 1.0 ® Equivalent Gates . 5.0 HDL Syntax Verilog ..... DL011 inst_name (Q, D, GN, RN); VHDL.
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No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | DL0165R |
Fairchild Semiconductor |
FSDL0165R | |
2 | DL001 |
AMI |
CMOS Gate Array | |
3 | DL002 |
AMI |
CMOS Gate Array | |
4 | DL021 |
AMI |
CMOS Gate Array | |
5 | DL031 |
AMI |
CMOS Gate Array | |
6 | DL04-18F1 |
Shindengen |
TVS | |
7 | DL04-33F1 |
SHINDENGEN |
TVS | |
8 | DL04-36F1 |
SHINDENGEN |
TVS | |
9 | DL0504S2-T6B0 |
D-first |
4-Line Ulta Low Capacitance TVS Array | |
10 | DL-100-7-KER |
Pacific Silicon Sensor |
Photo Diodes | |
11 | DL-100-7-KERSMD |
Pacific Silicon Sensor |
Photo Diodes | |
12 | DL-1080 |
AEMC |
(DL-1080 / DL-1081) DATA LOGGER USER MANUAL |