DL00x is a family of transparent, unbuffered D latch with active low gate transparency and without SET or RESET. Logic Symbol Truth Table DL00x DQ G GN D Q LLL L HH H X NC NC = No Change HDL Syntax Verilog ..... DL00x inst_name (Q, D, GN); VHDL....... inst_name: DL00x port map (Q, D, GN); Pin Loading Pin Name D GN Equival.
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No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | DL002 |
AMI |
CMOS Gate Array | |
2 | DL011 |
AMI |
CMOS Gate Array | |
3 | DL0165R |
Fairchild Semiconductor |
FSDL0165R | |
4 | DL021 |
AMI |
CMOS Gate Array | |
5 | DL031 |
AMI |
CMOS Gate Array | |
6 | DL04-18F1 |
Shindengen |
TVS | |
7 | DL04-33F1 |
SHINDENGEN |
TVS | |
8 | DL04-36F1 |
SHINDENGEN |
TVS | |
9 | DL0504S2-T6B0 |
D-first |
4-Line Ulta Low Capacitance TVS Array | |
10 | DL-100-7-KER |
Pacific Silicon Sensor |
Photo Diodes | |
11 | DL-100-7-KERSMD |
Pacific Silicon Sensor |
Photo Diodes | |
12 | DL-1080 |
AEMC |
(DL-1080 / DL-1081) DATA LOGGER USER MANUAL |