CY7C341B - Cypress Semiconductor

CY7C341B 192-Macrocell MAX EPLD

The CY7C341B is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within the device. The MAX® architecture is 100% user-configurable, allowing the devices to accommodate a variety of independent logic functions. The 192 macrocells in the CY7C341B are divided into 12 Logic Array Blocks (LABs), 16 per .

Features

• 192 macrocells in 12 logic array blocks (LABs)
• Eight dedicated inputs, 64 bidirectional I/O pins
• Advanced 0.65-micron CMOS technology to increase performance
• Programmable interconnect array
• 384 expander product terms
• Available in 84-pin HLCC, PLCC, and PGA packages macrocells within each LAB. Each LAB is interconnected with a programmable interconnect array, allowing all signals to be routed throughout the chip. The speed and density of the CY7C341B allows it to be used in a wide range of applications, from replacement of large amounts of 7400-series TTL logic, to complex controlle.