BLD6G21LS-50 - NXP Semiconductors

BLD6G21LS-50 TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty transistor

The BLD6G21L-50 and BLD6G21LS-50 incorporate a fully integrated Doherty solution using NXP’s state of the art GEN6 LDMOS technology. This device is perfectly suited for TD-SCDMA base station applications at frequencies from 2010 MHz to 2025 MHz. The main and peak device, input splitter and output combiner are integrated in a single package. This package cons.

Features

I Typical TD-SCDMA performance at frequencies from 2010 MHz to 2025 MHz: N Average output power = 8 W N Power gain = 13.5 dB N Efficiency = 42 % I Fully optimized integrated Doherty concept: N integrated asymmetrical power splitter at input N integrated power combiner N peak biasing down to 0 V N low junction temperature N high efficiency I Integrated ESD protection NXP Semiconductors BLD6G21L-50; BLD6G21LS-50 TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty transistor I I I I I Good pair match (main and peak on the same chip) Independent control of main and peak bias Internally matche.