AZ100LVEL33 - Arizona Microtek

AZ100LVEL33 ECL/PECL / 4 Divider

The AZ10/100LVEL33 is an integrated ÷4 divider. The RESET pin is asynchronous and clears the output (Q Low, Q ¯ High) on the rising edge. Upon power-up, the internal flip-flop will be in a random logic state. RESET allows for the synchronization of multiple LVEL33’s in a system. The LVEL33 provides a VBB output for single-end use or a DC bias reference for A.

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• PACKAGE Green / RoHS Compliant / Lead (Pb) Free package available Operating Range of 3.0V to 5.5V 470ps Propagation Delay 4.0GHz Toggle Frequency Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC10EL33, MC100EL33, and MC100LVEL33 Transistor Count = 91 Devices IBIS Model Files Available on Arizona Microtek Web Site MLP 8 (2x2) Green / RoHS Compliant / Lead (Pb) Free MLP 16 (3x3) SOIC 8 SOIC 8 TSSOP 8 TSSOP 8 1 2 3 PACKAGE AVAILABILITY PART NUMBER AZ100LVEL33NG MARKING C3G AZM L33 AZM10 LVEL33 AZM100 LVEL33 AZT LV33 AZH LV33 N.