AP2302L - BCD Semiconductor

AP2302L 2A DDR TERMINATION REGULATOR

The AP2302L linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 2A current continuously, providing enough current for most DDR applications. VOUT is designed to track the VREF voltage within a ± 20mV tolerance over the entire current range while preventing shooti.

Features

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· Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements Source and Sink Current up to 2A High Accuracy Output Voltage at Full-load Adjustable VOUT by External Resistors Shutdown for Standby or Suspend Mode Operation with High-impedance Output Applications
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· DDR-SDRAM Termination DDR-II Termination SSTL-2 Termination SOIC-8 TO-252-5 Figure 1. Package Types of AP2302L Nov. 2005 Rev. 1. 1 1 BCD Semiconductor Manufacturing Limited Preliminary Datasheet 2A DDR TERMINATION REGULATOR Pin Configuration AP2302L M Package (SOIC-8) VIN GND REFEN VOUT 1 2 3 4 8 7 6 5 VCNTL VCNT.