74SSTUB32865A - Texas Instruments

74SSTUB32865A 28-BIT TO 56-BIT REGISTERED BUFFER

This 28-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation. One device per DIMM is required to drive up to stacked 18 SDRAM loads or two devices per DIMM are required to drive up to 36 stacked SDRAM loads. All inputs are SSTL_18, except the chip-select gate-enable (CSGateEN) and reset (RESET) inputs, which are LVCMOS. All out.

Features

1
•2 Member of the Texas Instruments Widebus+™ Family
• Pinout Optimizes DDR2 RDIMM PCB Layout
• 1-to-2 Outputs Supports Stacked DDR2 RDIMMs
• High driver strength for heavily loaded DIMMs
• Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption
• Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line
• Supports SSTL_18 Data Inputs
• Differential Clock (CK and CK) Inputs
• Supports LVCMOS Switching Levels on the Chip-Select Gate-Enable and RESET Inputs
• Checks Parity on DIMM-Independent Data Inputs
• RESET Input Disables D.