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This device contains six independent gates each of which performs the logic INVERT function Connection Diagram Dual-In-Line Package June 1989 TL F 6442 – 1 Order Number DM54S04J DM54S04W DM74S04M or DM74S04N See NS Package Number J14A M14A N14A or W14B Function Table YeA Input Output AY LH HL H e High Logic Level L e Low Logic Level C1995 National .
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74S04 - Texas Instruments
ordering information These devices contain six independent inverters. SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | 74S00 |
ETC |
QUAD 2-input NAND GATE |
|
| 2 | 74S08 |
Fairchild Semiconductor |
Quad 2-Input AND Gate |
|
| 3 | 74S08 |
National Semiconductor |
Quad 2-Input AND Gates |
|
| 4 | 74S08 |
Texas Instruments |
Quadruple 2-Input Positive-AND Gates |
|
| 5 | 74S08N |
Fairchild Semiconductor |
Quad 2-Input AND Gate |
|
| 6 | 74S10 |
TW |
STTL type three 3-input NAND gate |
|
| 7 | 74S112 |
Fairchild Semiconductor |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
|
| 8 | 74S133 |
SYC |
13-Input NAND Gate |
|
| 9 | 74S134 |
Fairchild |
12-INPUT POSITIVE-NAND GATES |
|
| 10 | 74S134 |
Signetics |
12-INPUT POSITIVE-NAND GATES |
|
| 11 | 74S135 |
Fairchild |
Quad Exclusive OR/NOR Gate |
|
| 12 | 74S135 |
Signetics |
Quad Exclusive OR/NOR Gate |
|