The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications usi.
s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C. s s s s s s 3. Applications s Wave and pulse shapers for highly noisy environments. Philips Semiconductors 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V.
The 74LVC3G17 is a triple buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. Thi.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74LVC3G14 |
NXP |
Triple inverting Schmitt trigger | |
2 | 74LVC3G14 |
nexperia |
Triple inverting Schmitt trigger | |
3 | 74LVC3G16 |
nexperia |
Triple buffer | |
4 | 74LVC3G17-Q100 |
nexperia |
Triple non-inverting Schmitt trigger | |
5 | 74LVC3G04 |
NXP |
Triple inverter | |
6 | 74LVC3G04 |
DIODES |
TRIPLE INVERTER GATE | |
7 | 74LVC3G04 |
nexperia |
Triple inverter | |
8 | 74LVC3G04-Q100 |
nexperia |
Triple inverter | |
9 | 74LVC3G06 |
NXP Semiconductors |
Triple inverter | |
10 | 74LVC3G06 |
nexperia |
Triple inverter | |
11 | 74LVC3G07 |
NXP Semiconductors |
Triple buffer | |
12 | 74LVC3G07 |
nexperia |
Triple buffer |