The 74LVC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE: • A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. • A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes.
I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C I I I I I I I I NXP S.
The 74LVC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by th.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74LVC2G240 |
NXP Semiconductors |
Dual inverting buffer/line driver | |
2 | 74LVC2G240 |
nexperia |
Dual inverting buffer/line driver | |
3 | 74LVC2G240-Q100 |
nexperia |
Dual inverting buffer/line driver | |
4 | 74LVC2G241-Q100 |
nexperia |
Dual buffer/line driver | |
5 | 74LVC2G00 |
Diodes |
DUAL 2-INPUT NAND GATE | |
6 | 74LVC2G00 |
NXP |
Dual 2-input NAND gate | |
7 | 74LVC2G00 |
nexperia |
Dual 2-input NAND gate | |
8 | 74LVC2G00-Q100 |
NXP |
Dual 2-input NAND gate | |
9 | 74LVC2G00-Q100 |
nexperia |
Dual 2-input NAND gate | |
10 | 74LVC2G02 |
NXP |
Dual 2-input NOR gate | |
11 | 74LVC2G02 |
Diodes |
DUAL 2-INPUT NOR GATE | |
12 | 74LVC2G02 |
UTC |
DUAL 2-INPUT POSITIVE-NOR GATE |