These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less.
s Designed specifically for high speed: Memory decoders Data transmission systems s DM74LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception s DM74LS139 contains two fully independent 2-to-4-line decoders/demultiplexers s Schottky clamped for high performance s Typical propagation delay (3 levels of logic) DM74LS138 DM74LS139 DM74LS138 DM74LS139 21 ns 21 ns 32 mW 34 mW s Typical power dissipation Ordering Code: Order Number DM74LS138M DM74LS138SJ DM74LS138N DM74LS139M DM74LS139SJ DM74LS139N Package Number M16A M16D N16E M16A M16D N16E Package De.
The LS138 is a high speed 1-of-8 Decoder/Demultiplexer fabricated with the low power Schottky barrier diode process. Th.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74LS13 |
Motorola |
SCHMITT TRIGGERS DUAL GATE/HEX INVERTER | |
2 | 74LS13 |
Fairchild Semiconductor |
Dual 4-Input Schmitt Trigger | |
3 | 74LS13 |
Raytheon |
NAND Gates | |
4 | 74LS132 |
ON Semiconductor |
LOW POWER SCHOTTKY | |
5 | 74LS132 |
Fairchild Semiconductor |
Quad 2-Input NAND Gate | |
6 | 74LS132 |
Hitachi Semiconductor |
Quadruple 2-input Positive NAND Schmitt-triggers | |
7 | 74LS132 |
Motorola |
QUAD 2-INPUT SCHMITT TRIGGER NAND GATE | |
8 | 74LS133 |
Motorola |
13-INPUT NAND GATE | |
9 | 74LS134 |
ETC |
12-input NAND gate | |
10 | 74LS136 |
Fairchild Semiconductor |
Quad 2-Input Exclusive-OR Gate | |
11 | 74LS136 |
Hitachi Semiconductor |
Quadruple 2-input Exclusive-OR Gates | |
12 | 74LS137 |
Motorola |
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |