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This device contains four independent gates, each of which performs the logic exclusive-OR function. Ordering Code: Order Number DM74LS136M DM74LS136N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also ava.
5°C to +150°C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage LOW Level Output Current Free Air Operating Temperature 0 Parameter Min.
74LS136 - Hitachi Semiconductor
Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | 74LS13 |
Motorola |
SCHMITT TRIGGERS DUAL GATE/HEX INVERTER |
|
| 2 | 74LS13 |
Fairchild Semiconductor |
Dual 4-Input Schmitt Trigger |
|
| 3 | 74LS13 |
Raytheon |
NAND Gates |
|
| 4 | 74LS132 |
ON Semiconductor |
LOW POWER SCHOTTKY |
|
| 5 | 74LS132 |
Fairchild Semiconductor |
Quad 2-Input NAND Gate |
|
| 6 | 74LS132 |
Hitachi Semiconductor |
Quadruple 2-input Positive NAND Schmitt-triggers |
|
| 7 | 74LS132 |
Motorola |
QUAD 2-INPUT SCHMITT TRIGGER NAND GATE |
|
| 8 | 74LS133 |
Motorola |
13-INPUT NAND GATE |
|
| 9 | 74LS134 |
ETC |
12-input NAND gate |
|
| 10 | 74LS137 |
Motorola |
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
|
| 11 | 74LS138 |
Fairchild Semiconductor |
Decoder/Demultiplexer |
|
| 12 | 74LS138 |
ETC |
1-of-8 Decoder/Demultiplexer |
|