54LS192 - Motorola

54LS192 PRESETTABLE BCD/DECADE UP/DOWN COUNTER

The LS192 and LS193 are Asynchronously Presettable Decade and 4-Bit Binary Synchronous UP / DOWN (Reversable) Counters. The operating modes of the LS192 decade counter and the LS193 binary counter are identical, with the only difference being the count sequences as noted in the State Diagrams. Each circuit contains four master/slave flip-flops, with internal.

Features

y Internally Provided
• Input Clamp Diodes Limit High Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) V CC P0 16 15 MR TC D TC U PL 14 13 12 11 P2 P3 10 9 1 2 3 4 5 6 7 8 P1 Q1 Q 0 CP D CP U Q 2 Q 3 GND NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. PIN NAMES LOADING (Note a) HIGH LOW CPU CPD MR Count Up Clock Pulse Input Count Down Clock Pulse Input Asynchronous Master Reset (Clear) Input 0.5 U.L. 0.5 U.L. 0.5 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. PL Asynchronous Parallel Load (Active LOW) Input 0.5 .