The LS190 is a synchronous Up / Down BCD Decade Counter and the LS191 is a synchronous Up / Down 4-Bit Binary Counter. The operating modes of the LS190 decade counter and the LS191 binary counter are identical, with the only difference being the count sequences as noted in the state diagrams. Each circuit contains four master / slave flip-flops, with interna.
ency
• Synchronous Counting
• Asynchronous Parallel Load
• Individual Preset Inputs
• Count Enable and Up/ Down Control Inputs
• Cascadable
• Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC 16
P0 15
CP 14
RC 13
TC 12
PL 11
P2 10
P3 9
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
1 P1
2 Q1
3 Q0
4 CE
5 U/D
6 Q2
7 Q3
8 GND
PIN NAMES
LOADING (Note a)
HIGH
LOW
CE Count Enable (Active LOW) Input
1.5 U.L.
0.7 U.L.
CP Clock Pulse (Active HIGH going edge) Input 0.5 U.L. 0.25 U.L.
.
SN54190, SN54191, SN54LS190, SN54LS191, SN74190, SN74191, SN74LS190, SN74LS191 SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 54LS190 |
Texas Instruments |
SYNCHRONOUS UP/DOWN COUNTERS | |
2 | 54LS190 |
Motorola |
PRESETTABLE BCD/DECADE UP/DOWN COUNTERS | |
3 | 54LS190 |
National Semiconductor |
Synchronous 4-Bit Up/Down Counters | |
4 | 54LS192 |
Motorola |
PRESETTABLE BCD/DECADE UP/DOWN COUNTER | |
5 | 54LS193 |
Motorola |
PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER | |
6 | 54LS10 |
National Semiconductor |
Triple 3-Input NAND Gates | |
7 | 54LS109 |
National Semiconductor |
Dual Positive-Edge-Triggered J-K Flip-Flops | |
8 | 54LS109A |
Texas Instruments |
Dual J-K Positive-Edge-Triggered Flip-Flops | |
9 | 54LS11 |
National Semiconductor |
Triple 3-Input AND Gates | |
10 | 54LS114 |
National Semiconductor |
Dual JK Flip-Flop | |
11 | 54LS122 |
Texas Instruments |
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS | |
12 | 54LS122 |
Motorola |
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS |