No. | Partie # | Fabricant | Description | Fiche Technique |
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Toshiba Semiconductor |
2SA1930 opriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2007-06-15 ht |
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Toshiba Semiconductor |
2SA1941 c.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/"Derating Concept and Methods") and individual reliability data (i.e. relia |
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Toshiba |
Silicon PNP Transistor ime Symbol Test Conditions Min ICBO IEBO V (BR) CEO hFE (1) hFE (2) VCE (sat) VBE (sat) fT Cob VCB = −50 V, IE = 0 VEB = −7 V, IC = 0 IC = −10 mA, IB = 0 VCE = −1 V, IC = 1 A VCE = −1 V, IC = −3 A IC = −2 A, IB = −0.2 A IC = −2 A, IB = −0.2 A VC |
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Toshiba |
2SA1943 e within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability t |
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Toshiba |
Silicon PNP Transistor erature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual rel |
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Toshiba Semiconductor |
2SA1972 he Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2009-12-21 Datasheet pdf - http://www.DataSheet4U. |
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Toshiba Semiconductor |
TRANSISTOR he Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2009-12-21 Datasheet pdf - http://www.DataSheet4U. |
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Toshiba |
2SA1940 1) (Note) VCE = −5 V, IC = −1 A hFE (2) VCE = −5 V, IC = −4 A VCE (sat) VBE fT Cob IC = −6 A, IB = −0.6 A VCE = −5 V, IC = −4 A VCE = −5 V, IC = −1 A VCB = −10 V, IE = 0, f = 1 MHz Note: hFE (1) classification R: 55 to 110, O: 80 to 160 Min ― |
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Toshiba Semiconductor |
Silicon PNP Epitaxial Type Transistor the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 ht |
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Toshiba |
Silicon PNP Transistor age, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. |
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Toshiba Semiconductor |
Silicon PNP Transistor thin the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/"Derating Concept and Methods") and individual reliability data (i.e. reliability tes |
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Toshiba Semiconductor |
Silicon PNP Transistor e within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability t |
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Toshiba Semiconductor |
2SA1932 e appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2006-11 |
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Toshiba Semiconductor |
2SA1942 the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report |
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Toshiba |
Silicon PNP Transistor (1) High collector voltage: VCEO = -230 V (min) (2) Complementary to 2SC5200N (3) Recommended for 100-W high-fidelity audio frequency amplifier output stage 3. Packaging and Internal Circuit 2SA1943N 1. Base 2. Collector (Heatsink) 3. Emitter TO-3 |
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Toshiba Semiconductor |
SILICON PNP TRIPLE DIFFUSED TYPE TRANSISTOR O V (BR) CEO hFE (1) hFE (2) VCE (sat) VBE (sat) fT Cob VCB = −400 V, IE = 0 VEB = −7 V, IC = 0 IC = −10 mA, IB = 0 VCE = −5 V, IC = −20 mA VCE = −5 V, IC = −100 mA IC = −100 mA, IB = −10 mA IC = −100 mA, IB = −10 mA VCE = −5 V, IC = −50 mA VCB = −1 |
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Toshiba Semiconductor |
SILICON PNP TRIPLE DIFFUSED TYPE TRANSISTOR t capacitance Symbol ICBO IEBO VCEO hFE (1) hFE (2) VCE (sat) VBE (sat) fT Cob Test Condition VCB = −400 V, IE = 0 VEB = −7 V, IC = 0 IC = −10 mA, IB = 0 VCE = −5 V, IC = −20 mA VCE = −5 V, IC = −100 mA IC = −100 mA, IB = −10 mA IC = −100 mA, IB = |
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Toshiba |
Silicon PNP Transistor ime Symbol Test Conditions Min ICBO IEBO V (BR) CEO hFE (1) hFE (2) VCE (sat) VBE (sat) fT Cob VCB = −50 V, IE = 0 VEB = −7 V, IC = 0 IC = −10 mA, IB = 0 VCE = −1 V, IC = 1 A VCE = −1 V, IC = −3 A IC = −2 A, IB = −0.2 A IC = −2 A, IB = −0.2 A VC |
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Toshiba Semiconductor |
Silicon PNP Epitaxial Type Transistor lute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and e |
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Toshiba Semiconductor |
PNP Transistor opriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2007-06-15 ht |
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