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Thyristor IRRM Repetitive peak reverse current VR=VRRM Rated; IDRM Repetitive peak off-state current VD=VDRM Rated; Tc=25℃ Tc=100℃ Tc=125℃ MIN MAX UNIT 0.02 1.5 mA 3 VTM On-state voltage IGT Gate-trigger current VGT Gate-trigger voltage VD =12V;RL=60 |
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Silicon NPN Power Transistor llector-Emitter Saturation Voltage IC=800mA; IB= 80mA VBE(sat) base-emitter saturation voltage IC= 800mA; IB=80mA ICBO collector cut-off current I CEO collector cut-off current VCB =40 V,IE = 0 VCE= 20V, IB=0 IEBO Emitter Cutoff Current VEB=5 |
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Thyristor ate voltage ITM= 12A IGT Gate-trigger current VD = 12 V; RL=33Ω VGT Gate-trigger voltage VD = 12 V; RL=33Ω Rth(j-c) Thermal resistance Junction to case MIN MAX UNIT 0.02 0.5 mA 1 1.6 V 1 20 mA 1.5 V 1.3 ℃/W isc website：www.iscsemi.c |
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Thyristor YMBOL PARAMETER CONDITIONS IRRM Repetitive peak reverse current VRM=VRRM IDRM Repetitive peak off-state current VDM=VDRM Tj=25℃ Tj=125℃ VTM On-state voltage ITM= 30A IGT Gate-trigger current VD = 12 V; RL=60Ω VGT Gate-trigger voltage VD |
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INCHANGE |
Thyristor IGT Gate-trigger current VD = 12 V; RL=60Ω VGT Gate-trigger voltage VD = 12 V; RL=60Ω Rth(j-c) Thermal resistance Junction to case MIN MAX UNIT 0.02 1.0 mA 2.0 1.6 V 30 mA 1.5 V 2.4 ℃/W isc website：www.iscsemi.cn 1 isc & iscsemi is registere |
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Thyristor MAX UNIT 0.01 0.2 mA 0.5 1.6 V 1 15 mA 1.5 V 30 mA NOTICE： ISC reserves the rights to make changes of the content herein the datasheet at any time without notification. The information contained herein is presented only as a guide for the a |
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Schottky Barrier Rectifier ·With TO-247 packaging ·Low leakage current, low power loss, high efficiency ·High frequency operation ·High surge capability ·Low stored charge majority carrier conduction ·Minimum Lot-to-Lot variations for robust device performance and reliable ope |
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INCHANGE |
Schottky Barrier Rectifier ·With TO-247 packaging ·Low leakage current, low power loss, high efficiency ·High frequency operation ·High surge capability ·Low stored charge majority carrier conduction ·Minimum Lot-to-Lot variations for robust device performance and reliable ope |
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